Semiconductor Engineering

Assessing ESD Sensitivity Of Interface IP Using Charged Device Model

An electronic device is susceptible to Electrostatic Discharge (ESD) damage during its entire life cycle, especially from the completion of the silicon wafer processing to when the device is assembled ...
EDN

Electrostatic discharge testing standards – understanding & comparing the differences

Electrostatic discharge (ESD) is defined as “the sudden and momentary electric current that flows between two objects at different electrical potentials.” ESD causes equipment failure and network ...
Electronic Design

Is System-Level ESD Testing Valid for ICs?

Electronic system designs often include transient protection to ensure system robustness for electrostatic discharge (ESD) events. Adding external ESD protection without compromising system I/O speed, ...
Electronic Design

ESD Test Epuipment – HBM Device Failure- The Scourge of Static-Sensitive Operations

This close examination of S20.20 reveals the key ingredients to a successful ESD control program. Multinational manufacturing corporations are racing to pursue the cost benefits of economic geography.