EDN

Users describe design reuse in revised methodology manual

SAN JOSE, Calif. — The newly-published third edition of the Reuse Methodology Manual (RMM), a seminal text that defines a comprehensive approach to intellectual property (IP) reuse in chip designs, ...
Electronic Design

Methodology Manual For FPGA-Based Prototyping Is Win-Win

Are methodology manuals selfishly motivated by the vendors who produce them? Sure they are, but that doesn't mean there's nothing in it for you as a design engineer. Here's an introduction to the FPGA ...
Electronic Design

Low Power Methodology Manual: For System-On-Chip Design

Undertaking the design of a system-on-a-chip (SoC) is complex enough on its own merits. As is ever more the case, when power consumption is the primary design constraint, it becomes a task of enormous ...
Design-Reuse

Industry's First Low Power Verification Methodology Manual, Authored by ARM, Renesas Technology and Synopsys, is Now Available

MOUNTAIN VIEW, Calif. --, Feb. 23, 2009-- Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today announced the availability of the Verification ...