Nanowerk

Successful development of an upright-type double-gate MOS transistor capable of ultra-large scale in(...)

(Nanowerk News) The National Institute for Advanced Industrial Science and Technology (AIST) and Tohoku University have succeeded in manufacturing a high-performance upright-type double gate MOS ...
Semiconductor Engineering

Vertical MoS2 transistors with sub-1-nm gate lengths

Side-wall MoS 2 transistors with an atomically thin channel and a physical gate length of sub-1 nm using the edge of a graphene layer as the gate electrode Find the technical paper link here.
EDN

Insulated Gate Bipolar Transistor Basics

This application note describes the basic characteristics and operating performance of IGBTs. It is intended to give the reader a thorough background on the device technology behind IXYS IGBTs. The ...
EDN

Under the Hood: Intel’s 45-nm high-k metal-gate process

On Nov. 12, Intel shipped the first 45-nanometer microprocessors using high-k metal-gate technology. Whether to underscore the significance of the event or to reinforce that his famous law remains on ...