EDN

Designing DDR3 SDRAM controllers with today’s FPGAs

The recently introduced DDR3 SDRAM technology paves the way to higher data rates (from 800 Mbps to 1600 Mbps) and provides higher performance for many systems that depend on data, video, or packet ...
EDN

SDRAM interface slashes pin count

Many designs need deep buffering but don't require ultrahigh-memory bandwidth. Examples include image and audio processing, as well as some deep-FIFO applications. These designs often use a single ×8 ...
Electronic Design

DDR FCRAM Boosts Performance In DDR SDRAM Designs

A modified form of synchronous DRAM technology, double-data-rate, fast-cycle random access memory (DDR FCRAM) is primarily focused at the networking market segment. Yet due to its high performance, it ...
Design-Reuse

High Performance DDR3 SDRAM Controller from Eureka Technology Supports AHB and AXI Bus Interface.

Los Altos, California -- September 8th, 2008 --Eureka Technology Inc., a leading provider of system connectivity intellectual property (IP) cores, today announced its latest DDR3 SDRAM controller core ...
Design-Reuse

Xilinx Announces Industry's First Complete DDR400 SDRAM Interface Solution For FPGAs

SAN JOSE, Calif., April 24, 2003 - Xilinx, Inc., (NASDAQ:XLNX), today announced a complete suite of solutions to help advanced system designers to quickly implement FPGA-based interfaces to the latest ...
Digi Times

Taiwan SDRAM IC design house Etron said to secure orders from LCD panel makers

IC design house Etron Technology has started shipping 64Mbit (2Mbitx32) SDRAM to panel makers including AU Optronics (AUO) and Chi Mei Optoelectronics (CMO), with shipments this month contributing ...
Electronic Design

Probing Problems With DDR SDRAM

Coming soon to a PC near you is double-data-rate (DDR) SDRAM. This low-cost, high-performance technology targets both PC memory buses and embedded designs like high-end graphics systems. So how do you ...