EDN

AI workloads demand smarter SoC interconnect design

Instead of manually placing every switch, buffer, and timing pipeline stage, engineers can now use automation algorithms to ...
EDN

Atmel, Mentor to Integrate Tools for Programmable SOC Design Flow

Atmel Corp. and Mentor Graphics Corp. today announced an OEM agreement to develop a comprehensive design flow for Atmel’s programmable system-on-a-chip (SOC) designs. Under terms of the agreement, ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
SDxCentral

Synopsys 5G SoC enhances 5G development with new RF design flow for TSMC N6RF process

RFICs (Radio Frequency Integrated Circuits) for wireless data transmission systems, such as transceivers and RF front-end components, are becoming more complex based on the demands of our connected ...
Fox 5 San Diego

Baum’s Power Analysis Suite is Adopted for ASICLAND SoC Design Flow

PowerBaum is now offered through ASICLAND's solution SoC model, in which ASICLAND is involved in customers' product development process early on. Power analysis from the early design stage is very ...