LONDON — Alchimer SA (Massy, France), a provider of wet deposition processes for semiconductor interconnects and 3-D through-silicon vias (TSV), has said it has found a way to eliminate the seed-layer ...
PARIS — Alchimer SA, France-based provider of wet deposition processes for interconnections in 3D packaging applications, announced it has introduced a deposition process that is said to reduce cost ...
From large TSVs for MEMS to nanoTSVs for backside power delivery, cost-effective process flows for these interconnects are essential for making 2.5D and 3D packages more feasible. Through-silicon vias ...
AUSTIN, TX--(Marketwired - May 30, 2014) - SACHEM is announcing the release of Reveal Etch™, a wet chemistry designed to enable a single-step silicon etch / TSV reveal process. SACHEM and Solid State ...
Hsinchu, Taiwan, July 20, 2015 – United Microelectronics Corporation (NYSE:UMC;TWSE: 2303) ("UMC"), a leading global semiconductor foundry, today announced that it has entered volume production for ...
There is a forecast that the production capacity of high-bandwidth memory (HBM) by US-based Micron will be limited to around 20,000 wafers per month. This is about half of the level previously ...
The virtual study demonstrated that the SABC approach to backside power minimizes EPE and over-etch variations in the TSV ...
SINGAPORE--A new consortium has been established to advance the country's next-generation 300mm wafer manufacturing capabilities, by focusing on a technology for three-dimensional integrated circuits ...
Imec and SPTS Technologies are developing a short cycle-time dry silicon removal and low temperature passivation solution for through-silicon via-middle processing and thinning of the top-wafer in ...
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