EDN

Xilinx axes analog to cool CPLD power consumption

SAN MATEO, Calif. — Are complex programmable-logic devices (CPLDs) in their current form about to reach the end of the road? Xilinx Inc. believes that they are, and says the only way to keep scaling ...
Design-Reuse

Xilinx Ultra-Small CPLD Packaging Enables High Performance Sketchpad DSP Boards for 3DSP

SAN JOSE, Calif., January 29, 2003 - Xilinx, Inc., (NASDAQ:XLNX) today announced that 3DSP, a leading provider of configurable, scalable digital signal processor (DSP) architecture, used Xilinx chip ...
EDN

Xilinx Appoints New CPLD Division VP

Xilinx Inc. today announced the appointment of Patrick Little as VP and GM of its complex programmable logic devices (CPLD) division. Little will assume responsibility for all aspects of CPLD product ...
Hackaday

CPLD-Based Synchronization Of Multiple Software Defined Radios

Forgive the click bait headline, but the latest work from [Marco Bartolucci] and [José A. del Peral-Rosado] is really great. They’re using multiple HackRFs, synchronized together, with hybrid ...